An audio overview for learning on the go: https://youtu.be/qzc3zPX9UZM
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\nThe following papers were recommended by the Semantic Scholar API
\n- \n
- Pangu Ultra MoE: How to Train Your Big MoE on Ascend NPUs (2025) \n
- AccLLM: Accelerating Long-Context LLM Inference Via Algorithm-Hardware Co-Design (2025) \n
- Taming the Titans: A Survey of Efficient LLM Inference Serving (2025) \n
- COMET: Towards Practical W4A4KV4 LLMs Serving (2024) \n
- MoE-Lens: Towards the Hardware Limit of High-Throughput MoE LLM Serving Under Resource Constraints (2025) \n
- D$^{2}$MoE: Dual Routing and Dynamic Scheduling for Efficient On-Device MoE-based LLM Serving (2025) \n
- SlimPipe: Memory-Thrifty and Efficient Pipeline Parallelism for Long-Context LLM Training (2025) \n
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totally important
\n","updatedAt":"2025-07-19T04:46:03.434Z","author":{"_id":"66d848c16ff4d323370ec87c","avatarUrl":"https://cdn-avatars.huggingface.co/v1/production/uploads/66d848c16ff4d323370ec87c/NQnwJd6U2tfvvRbGMsggD.jpeg","fullname":"Melad","name":"genmnz","type":"user","isPro":false,"isHf":false,"isHfAdmin":false,"isMod":false,"followerCount":1}},"numEdits":1,"identifiedLanguage":{"language":"en","probability":0.9594603776931763},"editors":["genmnz"],"editorAvatarUrls":["https://cdn-avatars.huggingface.co/v1/production/uploads/66d848c16ff4d323370ec87c/NQnwJd6U2tfvvRbGMsggD.jpeg"],"reactions":[],"isReport":false}},{"id":"685bdbdf4a428dfb44334631","author":{"_id":"66c0a08bac74db25de8427ec","avatarUrl":"https://cdn-avatars.huggingface.co/v1/production/uploads/66c0a08bac74db25de8427ec/9D-piDBZqSt6KNkHImmkv.jpeg","fullname":"Jintao Zhang","name":"jt-zhang","type":"user","isPro":false,"isHf":false,"isHfAdmin":false,"isMod":false,"followerCount":23},"createdAt":"2025-06-25T11:22:07.000Z","type":"comment","data":{"edited":false,"hidden":false,"latest":{"raw":"Good work!\nHowever, this paper mentioned that: \"After aligning 32 mantissa products by right-shifting based on the maximum exponent, the Tensor Core only maintains their highest 13 fraction bits for addition, and truncates bits exceeding this range. Addition results are **accumulated to FP22 registers (1 sign bit, 8 exponent bits, and 13 mantissa bits).**\"\n\nTo my knowledge, this claim was **first** analyzed and proposed in the **SageAttention2** paper (**November 11, 2024**). I would appreciate it if you could cite **SageAttention2**. ","html":"Good work!
However, this paper mentioned that: \"After aligning 32 mantissa products by right-shifting based on the maximum exponent, the Tensor Core only maintains their highest 13 fraction bits for addition, and truncates bits exceeding this range. Addition results are accumulated to FP22 registers (1 sign bit, 8 exponent bits, and 13 mantissa bits).\"
To my knowledge, this claim was first analyzed and proposed in the SageAttention2 paper (November 11, 2024). I would appreciate it if you could cite SageAttention2.
\n","updatedAt":"2025-06-25T11:22:07.195Z","author":{"_id":"66c0a08bac74db25de8427ec","avatarUrl":"https://cdn-avatars.huggingface.co/v1/production/uploads/66c0a08bac74db25de8427ec/9D-piDBZqSt6KNkHImmkv.jpeg","fullname":"Jintao Zhang","name":"jt-zhang","type":"user","isPro":false,"isHf":false,"isHfAdmin":false,"isMod":false,"followerCount":23}},"numEdits":0,"identifiedLanguage":{"language":"en","probability":0.9091149568557739},"editors":["jt-zhang"],"editorAvatarUrls":["https://cdn-avatars.huggingface.co/v1/production/uploads/66c0a08bac74db25de8427ec/9D-piDBZqSt6KNkHImmkv.jpeg"],"reactions":[{"reaction":"🔥","users":["jt-zhang","dwidlee","thu-zzte","akjhnh","alspinu"],"count":5}],"isReport":false}}],"primaryEmailConfirmed":false,"paper":{"id":"2505.09343","authors":[{"_id":"682578ca1b93095c061429ff","user":{"_id":"66053b1f9e3555d648b21c3d","avatarUrl":"/avatars/c8b33e7f702c4edb17add47f0eafe5e6.svg","isPro":false,"fullname":"Chenggang Zhao","user":"LyricZ","type":"user"},"name":"Chenggang Zhao","status":"admin_assigned","statusLastChangedAt":"2025-05-15T13:50:09.165Z","hidden":false},{"_id":"682578ca1b93095c06142a00","name":"Chengqi Deng","hidden":false},{"_id":"682578ca1b93095c06142a01","user":{"_id":"6398203609f12714ed1935c2","avatarUrl":"https://cdn-avatars.huggingface.co/v1/production/uploads/6398203609f12714ed1935c2/uXgl0LgKnFYjq1Wz39-a6.jpeg","isPro":false,"fullname":"Chong Ruan","user":"Chester111","type":"user"},"name":"Chong Ruan","status":"admin_assigned","statusLastChangedAt":"2025-05-15T13:50:30.400Z","hidden":false},{"_id":"682578ca1b93095c06142a02","user":{"_id":"659389f8de82e1ef7b9a8b13","avatarUrl":"/avatars/896ed9f4cdbd317493b303d070b7e12a.svg","isPro":false,"fullname":"Damai Dai","user":"DeepSeekDDM","type":"user"},"name":"Damai Dai","status":"admin_assigned","statusLastChangedAt":"2025-05-15T13:50:51.345Z","hidden":false},{"_id":"682578ca1b93095c06142a03","user":{"_id":"64e370be59aa5366642ac329","avatarUrl":"/avatars/0fa1eb6ac6c1aeff3e65bc86a6617f64.svg","isPro":false,"fullname":"Huazuo Gao","user":"gaohuazuo","type":"user"},"name":"Huazuo Gao","status":"admin_assigned","statusLastChangedAt":"2025-05-15T13:51:03.129Z","hidden":false},{"_id":"682578ca1b93095c06142a04","user":{"_id":"64fca5f28d50404bc42ca78a","avatarUrl":"/avatars/ae01ac0296d6ce1277dacb6894f570b8.svg","isPro":false,"fullname":"Jiashi Li","user":"Beginlner","type":"user"},"name":"Jiashi Li","status":"admin_assigned","statusLastChangedAt":"2025-05-15T13:51:09.237Z","hidden":false},{"_id":"682578ca1b93095c06142a05","user":{"_id":"67367647517b82b436d74930","avatarUrl":"/avatars/34c1f894a3da9f38816d0b30bfdc6d50.svg","isPro":false,"fullname":"Liyue Zhang","user":"Lyriccc","type":"user"},"name":"Liyue Zhang","status":"admin_assigned","statusLastChangedAt":"2025-05-15T13:51:15.494Z","hidden":false},{"_id":"682578ca1b93095c06142a06","name":"Panpan Huang","hidden":false},{"_id":"682578ca1b93095c06142a07","user":{"_id":"654453e19b639f21e1d77d16","avatarUrl":"/avatars/079ec500c2ca7a31f6cb754b8c7ef065.svg","isPro":false,"fullname":"Shangyan Zhou","user":"syzhou","type":"user"},"name":"Shangyan Zhou","status":"admin_assigned","statusLastChangedAt":"2025-05-15T13:51:29.946Z","hidden":false},{"_id":"682578ca1b93095c06142a08","user":{"_id":"6482e57a04f67f5f6056a61b","avatarUrl":"/avatars/b26faf19ba1493b91102ac7978ab3230.svg","isPro":false,"fullname":"Shirong Ma","user":"msr2000","type":"user"},"name":"Shirong Ma","status":"admin_assigned","statusLastChangedAt":"2025-05-15T13:51:50.612Z","hidden":false},{"_id":"682578ca1b93095c06142a09","name":"Wenfeng Liang","hidden":false},{"_id":"682578ca1b93095c06142a0a","name":"Ying He","hidden":false},{"_id":"682578ca1b93095c06142a0b","name":"Yuqing Wang","hidden":true},{"_id":"682578ca1b93095c06142a0c","name":"Yuxuan Liu","hidden":false},{"_id":"682578ca1b93095c06142a0d","name":"Y. X. Wei","hidden":false}],"publishedAt":"2025-05-14T12:39:03.000Z","submittedOnDailyAt":"2025-05-15T05:22:39.526Z","title":"Insights into DeepSeek-V3: Scaling Challenges and Reflections on\n Hardware for AI Architectures","submittedOnDailyBy":{"_id":"5f1158120c833276f61f1a84","avatarUrl":"https://cdn-avatars.huggingface.co/v1/production/uploads/1608042047613-5f1158120c833276f61f1a84.jpeg","isPro":true,"fullname":"Niels Rogge","user":"nielsr","type":"user"},"summary":"The rapid scaling of large language models (LLMs) has unveiled critical\nlimitations in current hardware architectures, including constraints in memory\ncapacity, computational efficiency, and interconnection bandwidth. DeepSeek-V3,\ntrained on 2,048 NVIDIA H800 GPUs, demonstrates how hardware-aware model\nco-design can effectively address these challenges, enabling cost-efficient\ntraining and inference at scale. This paper presents an in-depth analysis of\nthe DeepSeek-V3/R1 model architecture and its AI infrastructure, highlighting\nkey innovations such as Multi-head Latent Attention (MLA) for enhanced memory\nefficiency, Mixture of Experts (MoE) architectures for optimized\ncomputation-communication trade-offs, FP8 mixed-precision training to unlock\nthe full potential of hardware capabilities, and a Multi-Plane Network Topology\nto minimize cluster-level network overhead. Building on the hardware\nbottlenecks encountered during DeepSeek-V3's development, we engage in a\nbroader discussion with academic and industry peers on potential future\nhardware directions, including precise low-precision computation units,\nscale-up and scale-out convergence, and innovations in low-latency\ncommunication fabrics. These insights underscore the critical role of hardware\nand model co-design in meeting the escalating demands of AI workloads, offering\na practical blueprint for innovation in next-generation AI systems.","upvotes":70,"discussionId":"682578cb1b93095c06142a55","ai_summary":"DeepSeek-V3 addresses hardware limitations through MLA, MoE, FP8 training, and Multi-Plane Network Topology, enabling efficient large-scale LLM training and inference.","ai_keywords":["Multi-head Latent Attention (MLA)","Mixture of Experts (MoE)","FP8 mixed-precision training","Multi-Plane Network Topology"]},"canReadDatabase":false,"canManagePapers":false,"canSubmit":false,"hasHfLevelAccess":false,"upvoted":false,"upvoters":[{"_id":"655e4c26d5c0d3db535cdd66","avatarUrl":"https://cdn-avatars.huggingface.co/v1/production/uploads/655e4c26d5c0d3db535cdd66/7gUJ8urq7mEZ4OE4ppQCj.png","isPro":false,"fullname":"Lincoln","user":"Presidentlin","type":"user"},{"_id":"6424e9a812ba34f9894c2bba","avatarUrl":"/avatars/b9cf556767fb84d5222f6e97270794df.svg","isPro":false,"fullname":"nezhazheng","user":"nezhazheng","type":"user"},{"_id":"65bb837dbfb878f46c77de4c","avatarUrl":"https://cdn-avatars.huggingface.co/v1/production/uploads/65bb837dbfb878f46c77de4c/PKyQ_-wTNH1Hyv5HxhWdX.jpeg","isPro":true,"fullname":"Prithiv Sakthi","user":"prithivMLmods","type":"user"},{"_id":"630920925a5c889aaedc7f33","avatarUrl":"https://cdn-avatars.huggingface.co/v1/production/uploads/630920925a5c889aaedc7f33/w00N19M21l2FXe6ZasSYc.jpeg","isPro":false,"fullname":"Kristaller486","user":"kristaller486","type":"user"},{"_id":"620783f24e28382272337ba4","avatarUrl":"https://cdn-avatars.huggingface.co/v1/production/uploads/620783f24e28382272337ba4/zkUveQPNiDfYjgGhuFErj.jpeg","isPro":false,"fullname":"GuoLiangTang","user":"Tommy930","type":"user"},{"_id":"646350107e9025b09bd62bab","avatarUrl":"https://cdn-avatars.huggingface.co/v1/production/uploads/646350107e9025b09bd62bab/TEOf1dZnZLE-4_-I6Eh-n.jpeg","isPro":false,"fullname":"momo","user":"wzc991222","type":"user"},{"_id":"66a9de7a9dda39356ebc7167","avatarUrl":"/avatars/007b7aab9f86ce3093292f23e0a612bc.svg","isPro":false,"fullname":"gong","user":"zhnegdong","type":"user"},{"_id":"648eb1eb59c4e5c87dc116e0","avatarUrl":"/avatars/c636cea39c2c0937f01398c94ead5dad.svg","isPro":false,"fullname":"fdsqefsgergd","user":"T-representer","type":"user"},{"_id":"633e570be7d5ce7bfe037a53","avatarUrl":"https://cdn-avatars.huggingface.co/v1/production/uploads/633e570be7d5ce7bfe037a53/zV8ULv4Mu7YIGZ8D3JtmK.jpeg","isPro":false,"fullname":"Zhaocheng Liu","user":"zhaocheng","type":"user"},{"_id":"64747f7e33192631bacd8831","avatarUrl":"https://cdn-avatars.huggingface.co/v1/production/uploads/64747f7e33192631bacd8831/dstkZJ4sHJSeqLesV5cOC.jpeg","isPro":false,"fullname":"Taufiq Dwi Purnomo","user":"taufiqdp","type":"user"},{"_id":"680c97253c7ca617c8d0d569","avatarUrl":"https://cdn-avatars.huggingface.co/v1/production/uploads/no-auth/tBck7jdbXOGJB_ykTYYoa.png","isPro":false,"fullname":"Zhong","user":"Kaikaikoa","type":"user"},{"_id":"668a17447d3f73951ed2ab84","avatarUrl":"/avatars/2a1785af3b1b02e495304d2b118accb0.svg","isPro":false,"fullname":"Shuai Wang","user":"Shuaiii","type":"user"}],"acceptLanguages":["*"],"dailyPaperRank":2}">Insights into DeepSeek-V3: Scaling Challenges and Reflections on Hardware for AI Architectures
Abstract
DeepSeek-V3 addresses hardware limitations through MLA, MoE, FP8 training, and Multi-Plane Network Topology, enabling efficient large-scale LLM training and inference.
The rapid scaling of large language models (LLMs) has unveiled critical limitations in current hardware architectures, including constraints in memory capacity, computational efficiency, and interconnection bandwidth. DeepSeek-V3, trained on 2,048 NVIDIA H800 GPUs, demonstrates how hardware-aware model co-design can effectively address these challenges, enabling cost-efficient training and inference at scale. This paper presents an in-depth analysis of the DeepSeek-V3/R1 model architecture and its AI infrastructure, highlighting key innovations such as Multi-head Latent Attention (MLA) for enhanced memory efficiency, Mixture of Experts (MoE) architectures for optimized computation-communication trade-offs, FP8 mixed-precision training to unlock the full potential of hardware capabilities, and a Multi-Plane Network Topology to minimize cluster-level network overhead. Building on the hardware bottlenecks encountered during DeepSeek-V3's development, we engage in a broader discussion with academic and industry peers on potential future hardware directions, including precise low-precision computation units, scale-up and scale-out convergence, and innovations in low-latency communication fabrics. These insights underscore the critical role of hardware and model co-design in meeting the escalating demands of AI workloads, offering a practical blueprint for innovation in next-generation AI systems.
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This is an automated message from the Librarian Bot. I found the following papers similar to this paper.
The following papers were recommended by the Semantic Scholar API
- Pangu Ultra MoE: How to Train Your Big MoE on Ascend NPUs (2025)
- AccLLM: Accelerating Long-Context LLM Inference Via Algorithm-Hardware Co-Design (2025)
- Taming the Titans: A Survey of Efficient LLM Inference Serving (2025)
- COMET: Towards Practical W4A4KV4 LLMs Serving (2024)
- MoE-Lens: Towards the Hardware Limit of High-Throughput MoE LLM Serving Under Resource Constraints (2025)
- D$^{2}$MoE: Dual Routing and Dynamic Scheduling for Efficient On-Device MoE-based LLM Serving (2025)
- SlimPipe: Memory-Thrifty and Efficient Pipeline Parallelism for Long-Context LLM Training (2025)
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totally important
Good work!
However, this paper mentioned that: "After aligning 32 mantissa products by right-shifting based on the maximum exponent, the Tensor Core only maintains their highest 13 fraction bits for addition, and truncates bits exceeding this range. Addition results are accumulated to FP22 registers (1 sign bit, 8 exponent bits, and 13 mantissa bits)."
To my knowledge, this claim was first analyzed and proposed in the SageAttention2 paper (November 11, 2024). I would appreciate it if you could cite SageAttention2.
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